Doctoral/Postdoctoral Position in Full-Duplex Wireline Transceivers with Echo Cancellation
Zürich, Switzerland
Doctoral/Postdoctoral Position in Full-Duplex Wireline Transceivers with Echo Cancellation
100%, Zurich, fixed-term
The Energy-Efficient Circuits and Intelligent Systems Group (EECIS) at the Department of Information Technology and Electrical Engineering (D-ITET), ETH Zurich, invites applications for a doctoral or postdoctoral position in the area of simultaneous bidirectional (full-duplex) wireline communication. The position is part of an Innosuisse innovation project with an industrial partner, developing a next-generation wireline transceiver for AI data centers.
Project background
AI data centers connect thousands of GPUs, and the links between them have become a bottleneck. Today’s 1.6 Tb/s electrical cables reach less than 3 m, which limits rack design and forces a costly move to optics. The project develops active electrical cables that significantly extend the reach. Instead of raising the symbol rate, it uses a space-time coded signaling scheme that lowers the baud rate, and an ADC-based receiver with digital equalization.
Simultaneous bidirectional (SBD) signaling sends and receives data on the same wire at the same time, which doubles the throughput of the link. The challenge is the echo: the receiver must recover a weak signal from the far end while its own transmitter produces an echo that can be several orders of magnitude stronger. Within the project, our group is responsible for the SBD interface. This position focuses on bringing SBD into the space-time coded transceiver, with an analog hybrid in the transmitter, a high-speed subtraction node in the receiver, and combined analog and digital echo cancellation for full-duplex operation at very high data rates.
Job description
- Develop system models of SBD signaling and echo cancellation, and derive circuit specifications in close exchange with the industrial partner
- Design, layout and tape out the circuits in advanced CMOS technology, and characterize the chips in our measurement lab
- Investigate new techniques for high-precision echo cancellation, combining analog circuits with digital signal processing
- Refine the design based on measurement results and support its integration into the transceiver
- Publish your results at leading venues of the field and present them at international conferences
- Contribute to the teaching activities of the group
Profile
- Master’s or Ph.D degree in electrical engineering or a closely related field, with excellent grades
- Solid background in analog and mixed-signal integrated circuit design
- Experience with high-speed wireline transceivers, equalization or echo cancellation is a strong advantage
- Knowledge of communication theory and signal processing, and experience with system modelling in Python or MATLAB
- Hands-on experience with Cadence Virtuoso or similar tools. Previous tape-out or lab measurement experience is a plus
- Ability to work independently and in an international team that spans academia and industry
- Excellent written and spoken English
Workplace
Workplace
We offer
The Energy-Efficient Circuits and Intelligent Systems Group (EECIS) focuses on circuits and systems for next-generation computing platforms. Its main interest is the energy-efficient design of the key circuit blocks of miniaturized systems, including analog interfaces, optical and RF transceivers, frequency synthesizers, power management units and data converters.
You can look forward to:
- A research project with a clear path from idea to silicon to a product for AI data centers
- Close collaboration with an industrial partner
- A complete IC design and verification environment
- Tape-out support from the ETH Microelectronics Design Center, with access to advanced CMOS processes through multi-project wafer runs
- Our own measurement lab equipped with advanced instruments
- A diverse, international and highly motivated team, with collaborations across ETH and worldwide
We value diversity and sustainability
Curious? So are we.
We look forward to receiving your online application with the following documents:
- Motivation letter (max. 1 page) describing your interest in the position and your relevant experience
- Curriculum vitae, including a list of publications if applicable
- Copies of your Bachelor’s and Master’s degree certificates and transcripts
- Names and contact information of two references
Further information about our group can be found on our website. Questions regarding the position should be directed to Prof. Dr. Taekwang Jang (tkjang@ethz.ch) (no applications).
Please note that we exclusively accept applications submitted through our online application portal. Applications via email or postal services will not be considered.
We would like to point out that the pre-selection is carried out by the responsible recruiters and not by artificial intelligence.
Application deadline: 30th of November.
Start date: 1st of February 2027 or upon agreement.